Saturday, November 1, 2008
Intel Maintains Microprocessor Momentum in Q3
ASE to leverage SUSS MicroTec’s litho equipment in wafer level packaging ops
By Ann Steffora Mutschler, Senior Editor -- Electronic News, 11/22/2007
Driven by market demands for faster, smarter, portable and integrated electronic products, semiconductor assembly and test services provider ASE Group said this week it will use lithography production equipment from Munich, Germany-based SUSS MicroTec including several production mask aligners and coat/bake/develop clusters for 200 mm and 300mm, in its move towards more sophisticated semiconductor applications.
The equipment is to be installed at ASE’s wafer level packaging and redistribution process facility in Kaohsiung, Taiwan.
The companies reminded that wafer level packaging is an advanced packaging technology whereby the die and package are manufactured and tested on the wafer, then diced into individually packaged ICs.
D.Y. Chen, VP of advanced packaging operations at ASE Kaohsiung said as a result of its more towards more sophisticated semiconductor application, the company has to rely on production equipment that allows high yields, unmatched throughput and cost effectiveness.
Semiconductor Packaging Materials
SPM is a diverse, world class manufacturer of interconnect solutions for the microelectronics industry. SPM products are currently divided into several product groups: bonding wire and ribbon, precision metal stampings, custom alloyed strip and cladded materials, and a variety of packaging solutions including waffle pack and tape on reel solutions.
SPM's products are assembled, integrated, or bonded to assemblies and subassemblies serving the data and wireless communications, automotive electronics, medical electronics, power semiconductors, microwave and RF, Internet server and European "smart card" industries.
Fine Gold and Aluminum wire and ribbon |
Stamped metal preforms |
Tape on Reel product |
Unisem Takes Copper Wire Bonding Process to Volume Production
Unisem Takes Copper Wire Bonding Process to Volume Production
Unisem plans to set up 30% of its wirebonders for copper by 2009. The industry's interest in copper wirebonding is being driven largely by copper's enhanced performance characteristics.
Sally Cole Johnson, Contributing Editor -- Semiconductor International, 10/15/2008 9:23:00 AM
The industry’s shift from gold to copper wire bonding is being driven largely by the enhanced performance characteristics of copper, such as its high tensile strength, thermal conductivity, lower electrical resistance and better performance during high-temperature storage tests. IDT, for example, recognized the traction copper is gaining as an interconnect material in semiconductor packaging, and is using Unisem’s copper wire bonds in its thin shrink small outline packages. “The clear advantages of copper — better performance and higher electrical test yields — helped convince us of the strategic benefits of copper wire,” said Anne Katz, IDT’s vice president of worldwide assembly and test.
Unisem sees material advantages to using copper wire bonds. |
Aluminum is presently used on discrete/power devices because of its current carrying capacity. “There are two trade-offs, though,” McKerreghan explained. “First, a lower productivity of wedge bonding compared to gold ball bonding. The second is a lack of flexibility to cope with complex wire layouts such as multi-tier and long wire lengths.”
Silver alloy is more conductive than gold and uses the same ball bonding process, according to McKerreghan, but has inconsistent pressure cooker test performance. Copper is also more conductive than gold and is considerably cheaper. “It uses the same ball bonding process with the addition of a forming gas to provide an inert environment during free air ball formation,” McKerreghan said. “Copper/aluminum intermetallics have considerably slower inter-diffusion than gold/aluminum intermetallics, which prevents Kirkendall voiding, ensuring better performance during high-temperature storage tests. Heavy copper wire, ≥2.0 mils in diameter, is already widely used in the industry today for power applications. With these, copper is selected as the most suitable replacement for gold wire.”
Although wire bonding remains the dominant form of interconnect between an IC and package, McKerreghan noted that the industry is beginning to see the need for flip-chip packaging because of the increase in device complexity, as well as being another way to remove the cost of gold from the equation with bumping materials such as copper and solder.